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Verilog demo for Tiny Tapeout 03

Three-factor delay learning rules based on eligibility propagation

C. Holtz et al. SA-PCB: Simulated Annealing-based Placement For PCB Layout. Original source code: https://github.com/The-OpenROAD-Project/SA-PCB

RL_PCB is a novel learning-based method for optimising the placement of circuit components on a Printed Circuit Board (PCB).

T.C Lin et al. Printed Circuit Board (PCB) router. Original source code: https://github.com/The-OpenROAD-Project/PcbRouter

T.C Lin et al. KiCad file importer/exporter, database, and DRC checker. Original source code: https://github.com/The-OpenROAD-Project/KicadParser

A collection of applications for the XLC thermocouple datalogger series.

A Xilinx Vivado project demonstrating a scripted build process